1. Field of the Invention
This invention relates to a nonvolatile semiconductor memory device capable of storing 2 or more levels of data in, for example, a single memory cell.
2. Description of the Related Art
For example, in a NAND flash memory, each of a plurality of memory cells arranged in the row direction is connected via a bit line to the corresponding latch circuit. Each latch circuit holds data in writing or reading data. All of or half of the cells (e.g., 2 to 4 KB of cells) arranged in the row direction are written to or read from simultaneously. The threshold voltage of a memory cell is set to a negative voltage in an erase operation and electrons are injected into the memory cell in a write operation, thereby setting the threshold voltage to a positive voltage (e.g., refer to Jpn. Pat. Appln. KOKAI Publication No. 2004-192789).
Since in the NAND flash memory, a plurality of memory cells are connected in series, it is necessary to turn on the unselected cells in a read operation. Thus, in a read operation, a voltage (Vread) higher than the threshold voltage is applied to the gate electrode. For this reason, the threshold voltage in a write operation must not exceed Vread. In a write sequence, a program operation and a program verify operation have to be carried out repeatedly for each memory cell so as to perform control to prevent the threshold voltage of the memory cell from exceeding Vread. This causes the problem of decreasing the writing speed.
To store large volumes of data, a multilevel memory capable of storing 2 bits or more in a cell has been developed. For example, to store 2 bits in a cell, it is necessary to set four threshold voltage distributions. For this reason, each of the threshold voltage distributions has to be set narrower than in a memory which stores one bit in a cell, which causes the problem of decreasing the writing speed further.
When the level of the read voltage Vread is raised, a high Vread is applied in a read operation, which causes a problem: erroneous writing is done. Moreover, when an attempt is made to write data at a higher one of the plurality of threshold voltages, a higher writing voltage is required. Since all of or half of the cells arranged in the row direction are written to simultaneously in the NAND flash memory, a high voltage is also applied to the unwritten cells, depending on data, which causes the problem of erroneous writing.
To avoid the problems, 4-level data requires four threshold voltage distributions to be set, 8-level data requires eight threshold voltage distributions to be set, and 16-level data requires 16 threshold voltage distributions in a limited threshold voltage range, for example, in the range of −2 to 5 V. With the recent improvement in the error correction capability by means of an error-correcting code (ECC), the threshold voltage distribution width can be set narrower and the data retention margin can be set smaller than before.
However, conditions, including temperature, in a program verify operation differ from those in a read operation. Moreover, a write voltage, a verify voltage, and a read voltage set by trimming the resistance of a voltage generator circuit in the die sort testing might shift with respect to the target voltage. For this reason, for example, a margin of about 80 mV has to be set between threshold voltage distributions. Therefore, although the correcting capability of ECC has been increased and each threshold voltage distribution width has been made apparently narrower, the setting margin remains large.
As described above, in a multilevel memory where a plurality of threshold voltages are set, it is better to set a margin between threshold voltages narrower. However, since conditions, including temperature, in a program verify operation differ from those in a read operation and there is a shift in the read voltage, write voltage, and verify voltage, some margin has to be set. Accordingly, even when the margin between threshold voltage distributions is narrow, a semiconductor memory device capable of reading stored data reliably has been desired.